Additive 3D photonic integration that is CMOS compatible

The backbone behind most of today’s cutting-edge technology is dense integration of two dimensional (2D) electronic circuits. However, by now these do experience several challenges. Further pushing the performance of 2D computing chips becomes increasingly difficult, while new applications, in particular neural networks (NNs), challenge the hegemony of such 2D circuits - and this on a fundamental level Dinc2020 ; Boahen2022 . New integration concepts and fabrication technologies are needed if we are to continue the astonishing technological progress of the past decades. Crucially, these integration concepts need to take the essential features behind the success of 2D electronic integrated circuits (ICs) into account.

Elevating a new integration technology even close to the level of 2D electronic ICs is a daunting and certainly a long-term challenge. Since the first demonstration of a planar, i.e. 2D, monolithic IC at Fairchild, this classical integration has continuously been advanced for 60 years plus in an almost world-wide effort. The concept’s success is a testimony to what can be achieved when previously individual components are integrated inside a single, monolithic circuit. It typically led to substantial miniaturization and increased reliability as well as robustness, all while fabrication costs plummeted. Combined, these factors enabled decades of exponential scaling for electronic ICs: around every two years the numbers of transistors per chips doubled (Moore’s law) while the power consumption per component halves (Dennard scaling). Monolithic ICs comprising different components and functionalities are therefore also indispensable for 3D photonic integration.

While still far from the levels of today’s electronic IC, photonic integration also has considerably advanced. In order to maximize compatibility and synergy with electronics, photonic integration based on silicon substrates emerged in the 1980s with the demonstration of the silicon waveguide Boyd1985 ; Soref1986 , the photonic equivalent to a metallic or polysilicon wire in integrated electronics ICs. Electronic ICs are almost exclusively based on complementary metal–oxide–semiconductor (CMOS) technology that uses mostly silicon as semiconductor host leveraging boron, gallium, indium, phosphorus, arsenic and bismuth as dopants, and CMOS compatibility is considered fundamentally important for photonic ICs.

By a vast majority, both, electronic and photonic integration leverages fabrication concepts developed for planar, 2D substrates. The layout of a circuit’s single layer is etched into a thin surface of either mostly metal or semiconductor materials, which is the process of 2D lithography. Typically, coating said surface with a photo-resist protects certain surface-areas from etching, which is determined by photo-resist illumination that is structured by a photo-mask. The appeal of such 2D lithography is that each of the involved process steps, photo-resist application, exposure by photo-mask, etching and several washing sequences, can be carried out in a single procedure for a large area or even an entire wafer, which strongly reduces fabrication costs.

A new challenge to classical electronics computers based on 2D substrates arose with the breakthrough of NN computing around a decade ago. Conceptually, NNs link a large number of neurons through the network’s connections, c.f. Fig. 1 (a). In an physical hardware implementation that mirrors this topology, these connections correspond to electronic or photonic signaling ’wires’. Currently, these connections are emulated, which creates substantial energy and speed overheads. Future NN circuits that abolish this overhead require ICs with a far higher degree of connectivity, i.e. much more wires to communicate signals across the chip. This causes several problems. Energetically speaking, electronic communication is the factor limiting performance even for classical computing concepts; communicating a floating point number costs around 80-times more energy than creating a new floating point number Dally2018 . NN computation dramatically escalates this problem, as the number of a NN’s connections by far out-scale the number of neurons. Photonic and 3D integration provide promising solutions, see Fig. 1 (b). Optical communication is (i) energetically superior for ever shorter distances and (ii) mitigates heat dissipation challenges that arise for volumetric circuits, while (iii) 3D integration shortens the length of communication links. Most importantly, in many NN topologies the number of connections, i.e. wires, increases quadratic or faster with the number of neurons. Consequently, integrating a NN’s interconnect in 2D results in a quadratic scaling (or worse) of chip-area with the size of a neural network. Recently, the number of neurons in a NN has turned into the parameter of fundamental relevance, and alternative strategies for integrating NNs are of fundamental importance for the field.

In this review for the RENATECH special issue, we describe our recent work addressing such photonic ICs based on standard techniques and fabrication infrastructure available in our local RENATECH cleanroom. In those efforts, we have demonstrated additive, 3D photonic integration, which importantly is using concepts and materials that make the entire fabrication and resulting photonic IC CMOS compatible. Based on additive two-photon polymerization (TPP) in a direct-laser writing (DLW) system, combined with rapid and large area one-photon polymerization (OPP), we integrated large 3D photonic waveguide circuits. We demonstrate individual waveguides as well as optical splitters and networks of splitter Grabulosa2023 based on (i) air-cladded waveguides comprising polymer cores Moughames2020 , and (ii) step-index waveguides where we induce the refractive index difference between core and cladding required for guiding by dynamically controlling the optical power used for printing our 3D structures Porte2021 . Finally, we substantially accelerate the fabrication process by developing the flash-TPP concept, which combines TPP-DLW with ultraviolet (UV) blanked illumination to efficiently polymerize an IC’s non-light guiding volume in a single step Grabulosa2022 . We achieve very symmetric splitting ratios in optical couplers, and (for a first proof of concept) low propagation losses of $\sim 1.3~{}$dB/mm and insertion losses of $\sim 0.26~{}$dB. Finally, we printed optical waveguides on semiconductor substrates hosting micro-lasers, demonstrating that our concept is CMOS compatible.

In the past 15 years, DLW and TPP have become a versatile fabrication tool of polymer structures with sub-micron dimensions deubel2004direct ; moughames2016wavelength ; anscombe2010direct . In contrast to 2D planar methods such as electron‐beam lithography or mask based lithography, DLW allows for fabricating three‐dimensional structures wang20223d . DLW has played a crucial role for many proof-of-concept designs in optics Moughames2020 , acoustics iglesias2021three ; frenzel2019ultrasound , elasticity chen20223d ; chen2022closed ; wang20223d ; dudek2022micro , robotics ji20214d and even electric transport kern2017experimental . Major challenges such as inclusion of conductive resins Blasco2016 , quantum-dots doped resins Mayer2017 , liquid-crystals doped resins munchinger20223d are still in the development phase. Recently, great progress towards parallel direct-laser writing has been made, which enables a substantially accelerated fabrication process kiefer2022parallelizing . Finally, different polymerization concepts are constantly being developed, some of which use novel approaches to high-resolution 3D printing based on polymer resins hahn2022light .

Standard photonic waveguides covered in this review rely the guiding element called the core having a higher refractive index $n_{\textrm{core}}$ than the refractive index of the confining part called the cladding $n_{\textrm{cladding}}$, i.e. $\Delta{n}=n_{\textrm{core}}-n_{\textrm{cladding}}>0$. As schematically illustrated in Fig. 1 (c), in such a configuration optical rays impinging on the core-cladding interface with an angle smaller than the critical angle $\theta_{\textrm{c}}=\arcsin(1-(\Delta{n}/n_{\textrm{core}}))$ exhibit total internal reflection. As a consequence, they are confined to the waveguide’s core and propagate along this structure, allowing to direct optical propagation along pre-designed paths via an integrated and solid core.

Refractive index contrast $\Delta{n}$ combined with the core diameter $d$ are a waveguide’s determining characteristics, which determine a waveguide’s numerical aperture $\textrm{NA}=\sqrt{n_{\textrm{core}}^{2}-n_{\textrm{cladding}}^{2}}$. The same holds for the number of spatial modes allowed to propagated through the waveguide $M\approx{V}^{2}/2=(4\pi{d}/\lambda)\textrm{NA}$ for large $M$, where $\lambda$ is the optical wavelength.. Here, $V$ is the normalized frequency a central indirect property of optical waveguides; for $V\leq{2.405}$ a waveguide is single-mode, otherwise it allows for higher modes to propagate. Finally, $\Delta{n}$ also determines the minimal bending radius for which light can be directed without exceedingly high losses. This in turn is the limiting factor for integration density inside a photonic IC.

In work covered in this review, we used the commercial 3D direct-laser writing Nanoscribe GmbH (Photonics Professional GT) system, which is equipped with a femtosecond (fs) laser operating at 780 nm, and galvo-mirrors for rapid beam movement in the lateral directions. The fs-laser is usually tightly focused into the resin through an objective lens of high numerical aperture. After finishing the TPP-DLW step, the unpolymerized resin was removed in a two-step development process, immersing the structure first in propylene-glycol-methyl-ether-acetate (PGMEA) acting as a developer for 20 minutes, followed by rinsing in isopropyl alcohol (2-propanol) for 3-5 minutes. For OPP, we deposited samples in the commercial UV-chamber Rolence Enterprise Inc., LQ-Box model, 405 nm wavelength, 150 mW/cm² average light intensity.

Polymer waveguides with an air cladding have a relatively large $\Delta{n}\approx 0.5$ with $n_{\textrm{core}}=1.51$. On the one hand, this leads to very strong confinement and a large $\textrm{NA}=1.13$, which enables very small bending radii of 25 $\mu$m (14 $\mu$m) at $\lambda=1550~{}$nm ($\lambda=650~{}$nm), and in turn dense photonic integration Shane2011 ; Bahadori2019 ; Lapointe2020 . The large $\Delta{n}$ makes fabricating single-mode waveguide circuits challenging. To be single-mode, air-cladded waveguides have to have a core diameter $d\leq{1}~{}\mu$m ($d\leq{0.43}~{}\mu$m) at $\lambda=1550~{}$nm ($\lambda=650~{}$nm). Printing waveguides with $d\leq{1}~{}\mu$m is possible Moughames2020 , and strongly confined photonic IC at $\lambda=1550~{}$nm are within reach. For photonic 3D ICs close to the visible wavelength of light this remains a challenge.

Recently, 3D optical splitter/combiners based on air-cladded waveguides with a 1 to 4, 1 to 9 and 1 to 16 configuration were printed using TPP moughames20203d ; moughames20213d . Figure 7 (a) shows an SEM image of the 1 to 4 fractal splitter/coupler, with its optical characterization at $\lambda=632~{}$nm shown in Fig. 7 (b). There, the distance between output ports was scanned within the range $D_{0}\in[10,12,...,20]~{}\mu$m while keeping their height constant at 52 $\mu$m. Losses do not substantially increase for smaller distance between the output ports, which validates the estimated minimal bending radii given before. Furthermore, this performance was evaluated for two different LP settings. No clear difference can be seen between the two data-sets, and hence the printing power for air-cladded 3D polymer waveguides is not a critical parameter, as long one stays within the dynamic power range.

For large-scale network interconnect, Moughames et al. demonstrated 3D parallel interconnects with high connectivity, shown in Figure 7 (c), by cascading two layers of 1 to 9 splitters and spatially multiplexing an arrays of such 1 to 81 splitters to allows for an array of 15x15 input waveguides. The entire circuits only occupies a volume of 460x460x300 $\mu m^{3}$, in which an interconnect for 225 inputs and 529 outputs is realized Moughames2020 . Figure 7 (d) shows a higher magnification of this interconnect. Individual wavegudies have a low surface roughness, and the incorporated chirality of the fractal splitters/couplers avoids intersections of individual waveguides.

Based on the previous discussed concepts and fabrication technologies, we addressed step- (STIN) and graded-index (GRIN) waveguides. In STIN waveguides, the refractive index of the waveguide’s core is constant, while for GRIN waveguides it is a function of the radial distance to the core’s center. Usually, GRIN waveguides follow a parabolic refractive index distribution. For the STIN waveguides, all bound rays propagate at angles within the total internal reflection condition $\theta_{\textrm{c}}$ at any position in the core cross-section, while for GRIN waveguides, the range of angles varies with position Snyder1983 .

We proposed a single-step additive fabrication technique, (3+1)D printing Porte2021 , by which we spatially modify the refractive index of a single resin over the TPP exposure dose during fabrication. Using the (3+1)D-printing concept, we constructed volume holograms and photonic waveguides with, both, STIN and GRIN profiles in a single-step, single-material fabrication with a commercially available process. This demonstrates the versatility of the 3D photonic integration approach based on DLW; optical manipulation based on integrated and monolithic 3D structures can either rely on discrete components, i.e. waveguides, or leverage continuous manipulations of free optical propagation, i.e. holograms Porte2021 . Both schemes can be exploited on the same photonic IC and be realized using the same fabrication concept and during the same fabrication step. We used the negative tone IP-Dip resin ($n\approx$ 1.547) Schmid2019 and a 63X magnification NA = 1.4 microscope objective, c.f. Fig. 5 (a).

The SEM micrograph of Fig. 8 (a) shows an exemplary cuboid embedding 20 STIN waveguides fabricated via (3+1)D-printing. Contrary to flash-TPP, in (3+1)D-printing all the 3D photonic chip volume is fabricated via TPP-only. The refractive index contrast $\Delta{n}$ between core-cladding waveguides is achieved from the control over the TPP dosage $D$ for individual writing voxels. For a higher (lower) refractive index as needed for the waveguide cores (claddings), one requires an accordingly higher (lower) LP, i.e. $D$. STIN waveguides result from a constant LP all across their core, while for GRIN waveguides the writing power changes from high to low following a parabolic profile.

To evaluate the optical performance, we fitted the experimental output intensities for diameters $d$ below the cut-off condition of the second propagation mode. The output intensity of the LP₀₁ mode of a STIN waveguides is described by $J_{0}^{2}(u\frac{r}{R})$ for $|$ r $|$ $<$ $R$ and $K_{0}^{2}(v\frac{r}{R})$ for $|$ r $|$ $>$ $R$, while for GRIN waveguides is given by an infinite parabolic refractive index profile as $\exp{-\frac{1}{2}V\frac{r^{2}}{R^{2}}}$ Snyder1983 . Figure 8 (b-c) depicts the fit of fundamental LP₀₁ mode to the normalized output of STIN and GRIN waveguides with radius $R~{}=~{}3~{}\mu$m, respectively. Considering the refractive index of the core constant ($n_{\textrm{core}}\approx$ 1.547), we obtained an averaged numerical aperture $<$NA$>$ = 0.08 $\pm$ 0.01 (i.e. $n_{\textrm{core}}$ = $n_{\textrm{cladding}}$ + 2.4 $\cdot$ 10^-3) for STIN and of $<$NA$>$ = 0.18 $\pm$ 0.02 for GRIN waveguides. As expected, the core-confinement of GRIN waveguides is significantly higher than for STIN waveguides due to the inner core refractive index modification, which offers a crucial advantage for photonic integration schemes Moughames2020 .

As seen, STIN waveguides with a polymer cladding have a refractive index contrast in the order of $\Delta{n}\approx$ 2.4$\cdot$10^-3, with low NA $\approx$ 0.12. Contrary than for air-cladded waveguides, this leads to large bending radii of 15 mm (7 mm) at $\lambda=1550~{}$nm ($\lambda=650~{}$nm), and in turn dense photonic integration is much more challenging for STIN waveguides. However, the low $\Delta{n}$ allows to have single-mode propagation for waveguide diameters $d\leq{9.8}~{}\mu$m ($d\leq{4.2}~{}\mu$m) at $\lambda=1550~{}$nm ($\lambda=650~{}$nm), which is standard with the current DLW-TPP fabrication technology. Future efforts include combining polymer and air-cladded waveguides, taking the strengths of each configuration in a single platform, i.e. air cladding waveguides providing highly-densed photonic integration with their small bending radii, while STIN waveguides serving as tools for single-mode propagation with large waveguides diameters over wide distances.

Recently, we demonstrated the fabrication of large scale 3D integrated photonic components via flash-TPP. Several features of flash-TPP make it an enabling technology for integration of larger circuits. Of primary importance is the substantial accelerated fabrication; without, fabrication of larger integrated circuits would quickly approach timescales beyond 24h Grabulosa2022 . Based on this approach, we demonstrated long (6 mm) single-mode waveguides, and we achieved exceptionally low injection ($\approx 0.26~{}$dB) and propagation ($\approx 1.3~{}$dB/mm) losses Grabulosa2022 .

Next as the demonstration of optical splitters and combiners based on this concept. These are the backbone of any photonic IC, and 3D integration enables interesting alternatives for creating 1 to M optical couplers without using sensitive optical interference units Soldano1995 . In 3D, 1 to M optical couplers can simply be realized by arranging numerous output waveguides around the input waveguide, something impossible to realize in a purely 2D integration setting. We demonstrated broadband 1 to M splitters leveraging adiabatic coupling Grabulosa2023 ; Grabulosa2023b . Adiabatic coupling achieves low-loss single-mode optical transfer from 1 to M waveguides through evanescent waves, where the optical mode adiabatically leaks from a tapered core of an input waveguide towards the cladding into inversely-tapered cores of the output waveguides Spillane2002 ; Collot1993 . All the previous studies consider the 2D case of only one to one adiabatic coupling between optical components Tiecke2015 .

In our work, we showed efficient single-mode adiabatic transfer with 1 input and up to 4 outputs via a single component. Figure 9 (a) illustrates the design for the exemplary case of a 1 to 2 adiabatic couplers. The waveguide’s circular core cross-section continuously changes as a function of propagation direction $z$. The originally circular core is reduced in size exclusively along the directions where an output waveguide is located; the core is essentially cut along plane surfaces. These cut-planes move towards the input core’s center during the taper-length $l_{\textrm{t}}$ at equal rate $d/l_{\textrm{t}}$ along the $(x,y)$-plane in order to match their relative effective modal indices Snyder1983 . Output waveguides follow exactly the same concept, yet in an inverted direction. We separated in and output waveguides via gap $g$ and studied the evanescence coupling efficiency between coupled waveguides Grabulosa2023 . The same tapering strategy was applied to 1 to 3 and 1 to 4 as depicted in the output intensity profiles from Fig. 9 (b).

We obtained record optical coupling losses of 0.06 dB for the optimal case of 1 to 2 adiabatic couplers, with a difference between the two outputs intensities of only $\sim 3.4~{}\%$. We furthermore demonstrated broadband functionality from 520 nm to 980 nm during which losses remain below 2 dB Grabulosa2023 . Importantly, these adiabatic couplers can be cascaded in order to exponentially increase the number of M outputs, c.f. Fig. 7 (c). We arranged a double-layer of 1 to 4 adiabatic couplers and the resulting 1 to 16 single-mode output intensities can be seen in the last diagram of Fig. 9 (b). Importantly, the global losses of the entire device is only 1 dB , and the entire circuit was realized within $(0.08\times 0.08\times 1.5)~{}$mm³ Grabulosa2023 .

High-density photonic integration requires the interconnection of several photonic platforms. Most of the current photonic devices are based on silicon-on-insulator (SOI) and CMOS technology. Combining the strength of multiple photonic and electronic systems in one hybrid and multi-chip platform can result in the diversification of specific computing tasks while increasing the overall performance.

A versatile fabrication technology with low-losses is of vital importance for the scalability of free-form as well as integrated optical interconnects in three-dimensions. The polymer-based 3D printing technology based on DLW-TPP is excellently suited to address these challanges, and several proof-of-concept studies have been realized Tiecke2015 ; Nesic2019 ; Saeed2020 . Figure 10 (a) shows photonic wire-bonding, realising a 3D photonic waveguide forming a point to point communication for a chip-to-chip connection between SOI chips hosting individual waveguides. The photonic wire-bond was fabricated via DLW-TPP using the negative-tone MicroChem SU-8 2075 photo-resist ($n\approx$ 1.51 at 1550 nm) Lindenmann2012 , and it connected two SOI waveguides separated a distance of 100 $\mu$m on different CMOS chips. This demonstrated for the fist time the basic viability of TPP-based 3D printing as a tool for CMOS compatible, wafer-scale as well as chip-to-chip connections.

A major challenge of the polymer-based 3D fabrication and the CMOS technology is the interaction of the CMOS substrate with the photo-resist during the TPP printing process. In a standard fabrication setting, the interaction between the fs-pulsed laser and the glass substrate is negligible since the substrate material, i.e. fused silica, is transparent at the wavelength of the fs-laser (780 nm), and low specular reflection. However, the CMOS technology is based on 2D stacking of multiple thin layers of semiconductor materials such as GaAs, InP or Silicon. These often have a bandgap energy below that of the writing laser, and in that case printing through the semiconductor substrate is impossible; only the ’dip-in’ concept is therefore a viable general approach for fabricating 3D photonic integrated circuits directly on top of a CMOS substrate based on DLW-TPP. Another challenge is the higher specular reflection, as these semiconductor materials have a higher refractive index. The resulting optical reflection of the fs-laser laser at the semiconductor substrate leads to a overpolymerization of the photo-resist if not compensated for. The LP therefore needs to be continuously adjusted at the vicinity of the CMOS/photonic circuit interface in order to achieve the intended degree of polymerization of the photo-resist. A further requirement is the precise alignment of the 3D photonic chip with the semiconductor device patterned on the CMOS substrate.

Figure 10 (b) depicts an exemplary 3D-printed cuboid integrating a cascaded 1 to 16 adiabatic coupler (cf. Fig. 9 (b)) printed via flash-TPP on top of a semiconductor substrate integrating quantum dot micropillar laser arrays. Each of the micropillar lasers consists of a cylindrical microcavity (a vertical arrangement of highly reflective distributed Bragg reflectors (DBR) alternating Al(Ga)As and GaAs mirror pairs) sandwiching a central gain section based on InGaAs self-assembled quantum dots (QDs). Further details about the fabrication and optical properties of the quantum dot micropillars laser arrays from Fig. 10 (b) can be found in Reitzenstein2007 ; Heuser2018 ; Reitzenstein_2010 . We used IP-S photo-resist for the fabrication, with a lower laser power LP = 6.5 mW (compared to the previously LP = 15 mW) in order to avoid microexplosions of the photo-resist at the semiconductor-polymer interface during TPP printing. After development, the 3D photonic chip is then polymerized via OPP with a exposure dose $D~{}=$ 3000 mJ/cm². The SEM micrograph shows the perfectly aligned 3D photonic structure with the angle of the periodic GaAs micropillar array. We checked the adherence of the polymer over time, and after a continuously observation over more than 4 months no deterioration has been found. This confirms the reliability of integrating our 3D printing technology with CMOS-based micro-laser arrays.

Here, we present a review over our recent work addressing additive manufacturing towards future 3D photonic integration of optical components that is CMOS compatible. Based on one- and two-photon polymerization processes combined with direct-laser writing systems, we demonstrated the fabrication of high performance individual photonic waveguides as well as scalabale optical splitters. All such 3D structures have been fabricated in our local FEMTO-ST RENATECH infrastructure.

We demonstrated that using the commercial DLW-TPP Nanoscribe GmbH (Photonics Professional GT) system and the ’dip-in’ DLW strategy, we are able to the construct, both, air- and polymer-claddded photonic waveguides. For air-cladded waveguides, we used a TPP-only, a single-step and single resin (IP-Dip resist). A 3D IC comprising a network of fractal optical splitter with 225 input and 529 output waveguides only occupies a volume of 460x460x300 ${\mu}m^{3}$. Such air-cladded waveguide ICs are prime candidates for highly-dense photonic packaging thanks to their low bending-radii on 10s of $\mu{m}$ scale. For polymer-cladded waveguides, we presented two different strategies in which we 3D-printed the waveguide cores via TPP while achieving a precise control over the refractive index contrast $\Delta{n}$ via, (i), the adjustment of the fs-laser dose $D$ on an single-voxel level, i.e. (3+1)D-printing, and (ii), the duration of UV blanket exposure that determines the OPP dosage $D$ to fix the index of the cladding material for the entire photonic IC in a single shot, i.e. flash-TPP. Noteworthy, both fabrication concepts require a single procedure writing step and a single resin (IP-S resist). Importantly, with flash-TPP fabrication times are reduced by up to $\approx 90~{}\%$ compared to (3+1)D-printing thanks to the additional OPP process. Via flash-TPP, we achieved polymer-cladded waveguides with refractive index contrast $\Delta{n}\approx$ 5$\cdot$10^-3, with low 1.3 dB/mm (0.26 dB) propagation (injection) losses while printing waveguides up to 6 mm heigh. This allows to have single-mode propagation over large distances. We demonstrated the fabrication, via flash-TPP, of scalable-boadband couplers leveraging adiabatic transfer from 1 input up to 4 outputs. Using a tapered/inversely-tapered waveguide sequence, we achieved record 0.06 dB optical coupling losses with very symmetric splitting ratios. We arranged a double-layer of 1 to 4 adiabatic couplers, resulting in a device with 16 single-mode outputs with only 1 dB global losses.

Importantly, we demonstrated the compatibility of our fabrication methodology based on DLW-TPP with CMOS substrates. As a proof-of-concept, we successfully 3D-printed our cascaded 1 to 16 adiabatic couplers on top of a CMOS substrate integrating GaAs quantum dot micropillar laser arrays. Preliminary characterization of these structures shows encouraging performance in terms of losses and stability.

Overall, in this review we have covered our novel 3D-printing technology, which represents a breakthrough with the potential to become a high-impact tool for the hybrid, highly-dense and hence compact packaging of, both, electronic and photonic devices. The concepts opens several potential avenues for future exploration. The combination of air- and polymer-cladded waveguides could enable dense integration with simultaneous precise control over optical signal properties such as mode number, polarization and phase. As the concept leverages photo-polymerization, in principle the large-scale and exceptionally performing production facilities of CMOS electronic integration could be amended with 3D photonic integration capability. Due to the excellent compatibility of standard photo-resins, the approach is largely agnostic to the underlying substrate. In this it is more flexible than integrated silicon photonics, and fabricating additively on a already processed CMOS substrate removes many of the challenges compared to fabricating photonic ICs based on different process - such as DLW directly into bulk dielectrics followed by bonding to CMOS.

The authors would like to thank Stephan Reitzenstein for his contribution through fabricating the semiconductor laser sample used for producing the circuit shown in Fig. 10 (b) and Erik Jung for the valuable help on the design of 3D waveguides. This work was partly supported by the french RENATECH network and its FEMTO-ST technological facility. The authors acknowledge the support of the Region Bourgogne Franche-Comté. This work was supported by the EUR EIPHI program (Contract No. ANR-17-EURE- 0002), by the Volkswagen Foundation (NeuroQNet II), by the French Investissements d’Avenir program, project ISITE-BFC (contract ANR-15-IDEX-03), by the European Union’s Horizon 2020 research and innovation programme under the Marie Skłodowska-Curie grant agreements No. 713694 (MULTIPLY).