Binary full adder, made of fusion gates, in sub-excitable Belousov-Zhabotinsky system

Information processing potential of a spatially extended, thin layer, Belousov-Zhabotinsky (BZ) medium Belousov (1959); Zhabotinsky (1964) was firstly demonstrated in late 1980s in pioneer works by Kuhnert, Agladze and Krinsky on experimental laboratory implementation of spatial memory devices and image processing prototypes in the excitable chemical medium Kuhnert (1986); Kuhnert et al. (1989). Their findings, albeit with a ten years delay, ignited a series of well founded theoretical and experimental works on realisation of computing devices in BZ medium. These include logical gates implemented in geometrically constrained BZ medium Steinbock et al. (1996); Sielewiesiuk and Górecki (2001), approximation of shortest path by excitation waves Steinbock et al. (1995); Rambidi and Yakovenchuk (2001); Adamatzky and de Lacy Costello (2002), memory in BZ micro-emulsion Kaminaga et al. (2006), information coding with frequency of oscillations Gorecki et al. (2014), onboard controllers for robots Adamatzky et al. (2004); Yokoi et al. (2004); Vazquez-Otero et al. (2014), chemical diodes Igarashi and Gorecki (2011), BZ neuromorphic architectures Gorecki et al. (2009); Gentili et al. (2012); Stovold and O’Keefe (2012); Takigawa-Imamura and Motoike (2011), wave-based counters Gorecki et al. (2003), and other aspects of information processing in excitable chemical systems Yoshikawa et al. (2009); Escuela et al. (2014); Gruenert et al. (2014); Gorecki et al. (2015).

So far no complete arithmetical circuit has ever been implemented in BZ in experimental conditions. Some preparatory steps have been done. They include simulation and experimental laboratory realisation of basic logical gates Adamatzky (2004); Adamatzky and de Lacy Costello (2007); Toth et al. (2010); Adamatzky et al. (2011) and generators of mobile localizations (they can play a role of constant True) in light-sensitive BZ medium de Lacy Costello et al. (2009) and adaptive design of simple logical gates using machine learning techniques Toth et al. (2009). The main reason for such slow experimental progress is instability of localised excitation wave-fragments: the waves are either collapse or expand unless some external periodical stimulation is applied. First one-bit half-adder in geometrically-constrained light-sensitive BZ medium is proposed in Adamatzky (2010), however the implementation required dynamical update of the illumination level to prevent excitation wave-fragments from collapsing or expanding. Models of multi-bit binary adder, decoder and comparator in BZ are proposed in Sun and Zhao (2013); Zhang et al. (2012); Sun and Zhao (2015); Guo et al. (2015). These architectures employ such crossover structures as T-shaped coincidence detectors Gorecka and Gorecki (2003) and chemical diodes Igarashi and Gorecki (2011) that heavily rely on heterogeneity of geometrically constrained space.

Indeed by controlling excitability Igarashi et al. (2006) in different loci of the medium we can achieve impressive results, as it is demonstrated in works related to polymorphic logical gates Adamatzky et al. (2011), analogs of dendritic trees Takigawa-Imamura and Motoike (2011) and, particularly, implementation of four-bit input, two-bit output integer square root circuits based on alternating ‘conductivity’ of junctions between channels Stevens et al. (2012), however experimental prototypes show a high degree of instability and sensitivity to environmental conditions. In present paper we try to overcome the problem of excitation wave-fragments instability via combining geometrical-constraining and collision-based approaches.

The paper is structured as follows. We define Oregonator model of BZ medium and discuss parameters of simulation in Sect. II. In Sect. III we outline differences in wave-front behaviour in excitable and sub-excitable BZ medium. The fusion gate is designed and its behaviour is simulated and analysed in Sect. IV. Section V presents architecture of a one-bit half adder made of a fusion gate. Two fusion gates are cascaded into a one-bit full adder in Sect. VI. In Sect. VII we show how to cascade one-bit full adders into a many-bit full adder. Feasibility of the approach is discussed in Sect. VIII.

We use two-variable Oregonator equation Field and Noyes (1974) adapted to a light-sensitive Belousov-Zhabotinsky (BZ) reaction with applied illumination Beato and Engel (2003):

The variables $u$ and $v$ represent local concentrations of an activator, or an excitatory component of BZ system, and an inhibitor, or a refractory component. Parameter $\epsilon$ sets up a ratio of time scale of variables $u$ and $v$, $q$ is a scaling parameter depending on rates of activation/propagation and inhibition, $f$ is a stoichiometric coefficient. Constant $\phi$ is a rate of inhibitor production. In a light-sensitive BZ $\phi$ represents the rate of inhibitor production proportional to intensity of illumination (1).

We integrate the system using Euler method with five-node Laplace operator, time step $\Delta t=0.001$ and grid point spacing $\Delta x=0.25$, $\epsilon=0.02$ (see Sect. III), $f=1.4$, $q=0.002$. The parameter $\phi$ characterises excitability of the simulated medium.

To generate excitation waves of wave-fragments we perturb the medium by square solid domains of excitation, $10\times 10$ sites in state $u=1.0$; if different shape of perturbation was used we indicate this in the captions of the figures.

The medium is excitable and exhibits ‘classical’ target waves when $\phi=0.05$ and the medium is sub-excitable with propagating localizations, or wave-fragments, when $\phi=0.0766$. Time lapse snapshots provided in the paper were recorded at every 150 time steps, we display sites with $u>0.04$.

The model has been repeatedly verified by us in experimental laboratory studies of BZ system, and the perfect match between the model and the experiments was demonstrated in Adamatzky and de Lacy Costello (2007); de Lacy Costello et al. (2009); Toth et al. (2010); Adamatzky et al. (2011).

We adopt the following symbolic notations. Boolean variables $x$ and $y$ take values ‘0’, logical False, and ‘1’, logical True; $xy$ is a conjunction (operation and), $x\oplus y$ is exclusive disjunction (operation xor), $\overline{x}$ is a negation of variable $x$ (not). Disjunction (OR) of variables $x$ and $y$ is $x+y$.

Given initial asymmetric excitation domain a wave-fragment is formed. The fragment’s velocity vector is a normal to longest side of the perturbation domain. The medium is excited by rectangular domains of perturbed sites. The perturbation domains are elongated along north-south axis therefore wave-fragments generated propagate west and east. In excitable medium, with low threshold of excitation, every resting site neighbouring excited site becomes excited. Therefore literally a point-wise excitation is enough to generate full-scale omni-directional wave. In sub-excitable medium a resting site needs several excited neighbours to get excited. Initially asymmetric wave will cause excitation of resting sites residing nearby middle of the wave-front only. Therefore the excitation wave-fragment ‘grows’ from its centre and ‘dies’ at its ends. This is why wave-fragments in Fig. 1 propagate only east and west and shrink or just slightly expand along south-north direction.

Depending on medium’s excitability wave-fragments may expand (Fig. 1a), keep their shape for a long time (Fig. 1b) or collapse (Fig. 1c). In ideal situation, assuming that wave-fragments keep their shapes indefinitely, we can implement a collision-based computing circuit of any depth subject to space availability. However in reality, particularly in conditions of chemical laboratory experiments, wave-fragments are very unstable. It is almost impossible to keep a medium at the precise level of sub-excitability (Fig. 1b), and almost any wave-fragment will expand (Fig. 1a) or collapse (Fig. 1c).

It is possible to keep wave-fragment from collapsing or exploding by periodically changing excitability of the medium Sakurai et al. (2002). When a wave-fragment expands we increase illumination level thus decreasing the medium’s excitability. When the wave-fragment starts to collapse the illumination is decreased, the medium’s excitability increases and the wave-fragment expands. In designs of logical circuits when channels are represented by shadowed areas and other parts of medium with illuminated areas, it would be difficult to keep periodicity of illumination and synchronise signals are the same time. Therefore, we adopted the following approach. We keep the medium in excitable mode inside channels and in sub-excitable mode at the junctions. Thus we do not worry about collapsing of wave-fronts inside channels, yet we keep wave-fronts localised when they cross junctions between channels.

When two wave-fragments, of equal size, travelling towards each other in a sub-excitable medium collide head-on, they annihilate. When the wave-fragments collide at an acute angle they fuse into a single wave-fragment (Fig. 2). If one of the wave-fragments was present another fragment would move along its original trajectory.

This give us an idea of a fusion gate. The gate is built of channels containing BZ medium being in a sub-excitable mode. The gate has two input channels and three outputs channels (Fig. 3a). When there is a wave-fragment present in the input channel $x$ ($y$) we assume that input variable $x$ ($y$) takes logical Boolean value True, $x=1$ ($y=1$); otherwise Boolean value False, $x=0$ ($y=0$).

If the gate is in excitable mode and initiated with input $x=1$ and $y=0$ (Fig. 3b and Fig. 4ab), then wave-fragment propagating along input channel $x$ expands at the junction (Fig. 4cd). Excitation wave-front then enters all other channels (Fig. 3b and Fig. 4ef). Such gate implements only multiplication of a signal and it is not useful for a realisation of logical functions. If the gate is in a sub-excitable mode and initiated with $x=1$ and $y=0$ (Fig. 3c and Fig. 4gh) then the wave-fragment does not expand at the junction (Fig. 4ij) but continues through the junction along its original trajectory Fig. 4kl).

If the gate was in excitable mode and initiated with input $x=1$ and $y=1$ (Fig. 3d) the wave-fragments collide, fuse and expand. The excitation wave-fronts enter all three output channels. In sub excitable mode the wave-fragments fuse (Fig. 3e) into a single localised wave-fragment which enters the central output channel (Fig. 5).

Thus, assuming that presence of a wave-fragment in an output channel symbolises logical variable in state True at the output channel, we conclude that the fusion gate, being in sub-excitable mode, implements two-input-three-output Boolean logic gate $\langle x,y\rangle\rightarrow\langle\overline{x}y,xy,x\overline{y}\rangle$ (Fig. 3a). The fusion gate is a key component of a one-bit half-adder presented in next section.

A one-bit half-adder is a device with two inputs $x$ and $y$ and two outputs $xy$ (Carry out) and $x\oplus y$ (Sum). The half-adder based on the fusion gate is shown in Fig. 6. It consists of two input channels $a$ and $b$ and two output channels $g$ and $h$. Presence/absence of a wave-fragment in an input/output channel symbolises logical True/False state of the input variable assigned to the channel. Synchronisation of signal wave-fragments is achieved geometrically: $|a|+|e|+|g|=|b|+|d|+|g|=|a|+|f|+|h|$, where $|\cdot|$ is a length of a channel (Fig. 6).

The half-adder has three junctions $c$, $i$ and $j$ (Fig. 6). The junction $c$ is key part of the fusion gate (Fig. 3a) and propagation of wave-fragments through this junction has been discussed in Sect. 3. Propagation of waves via junctions $i$ and $j$ is illustrated in Fig. 7 for excitable (Fig. 7ac) and sub-excitable (Fig. 7bd) modes.

If the system was in excitable mode then wave-fragment entering junction $i$ via channel $f$ would expand and propagate into channels $e$ (above and below the junction) and $h$ (Fig. 7a). Similarly, the wave-fragment entering junction $j$ from channel $d$ expands and propagates into channels $j$, $e$ and $h$ (Fig. 7a). Signals are multiplied and thus, again, the device being in excitable mode is not useful for implementing logical functions. When the system is in sub-excitable mode a wave-fragment entering junction $i$ via channel $f$ stays localised and propagates only into channel $h$ (Fig. 7b). Similarly, a wave-fragment entering junction $j$ from channel $d$ propagates only into channel $g$ (Fig. 7d). There is no such combination of inputs which might lead to collision of two wave-fragments in junction $i$, therefore we do not consider such scenario.

The half-adder in action is shown in Fig. 8. When inputs are $x=1$ and $y=0$ a wave-fragment is initiated in channel $a$. The wave stays localised (without expansion) when propagating via junction $c$ and enters channel $e$. The wave travels along the channel $e$ and through junction $i$ and $j$ and enters output channel $g$ (Fig. 8a). Similarly, when inputs are $x=0$ and $y=1$ a wave is initiated in channel $b$, propagates though junction $c$, along channel $d$, via junction $j$ and enters output channel $g$ (Fig. 8b). If both inputs takes value True excitation wave-fragments are initiated in channels $a$ and $b$ simultaneously. The wave-fragments collide at junction $c$ and fuse into a single wave-fragment. This newly born wave-fragment propagates into channel $f$. The wave travels along channel $f$, passes though junction $i$ without expansion and enters the output channel $h$ (Fig. 8c).

A wave-fragment appears in output channel $g$ only if either a wave-fragment was initiated either in input channel $a$ or input channel $b$. Therefore, the channel $g$ represents logical operation $x\oplus y$. A wave-fragment appears in output channel $h$ only if wave-fragments were initiated in input channels $x$ and $y$. Therefore, the channel $h$ represents logical operation $xy$. Thus, we illustrated how the half-adder shown in Fig. 6 is derived.

A one-bit full adder is a device with three inputs $x$, $y$ and $z$ (Carry in) and two outputs $xy+z(x\oplus y)$ (carry out) and $x\oplus y\oplus z$ (Sum). The full adder is made of two half-adders (Fig. 9) by cascading Carry in into input channel of second half-adder, Sum of first half-adder into second input of second half-adder, and Carry out of first half-adder into or junction with Carry out output channel of second half-adder. The one-bit full adder has three inputs channels $a$, $b$ and $c$ (they represent carry in $z$, and added bits $x$ and $y$) and two output channels $t$ and $u$ (they represent sum $x\oplus y\oplus z$ and carry out $xy+z(x\oplus y)$). Synchronisation of signals is achieved geometrically: $|a|+|e|+|p|+|t|=|b|+|h|+|k|+|n|+|t|=|c|+|f|+|k|+|n|+|t|=|b|+|g|+|l|+|u|$. Six junctions $d$, $i$, $j$, $m$, $r$ and $s$ are types of junctions already discussed in Sect. 8.

The one-bit full adder in action is shown in Fig. 10. When Carry in has bit up, $z=1$, and two inputs bits are down, $x=0$ and $y=z$ the wave-fragment is originated only in input channel $a$ (Fig. 10a). The wave travels along channel $e$, through junction $m$, enters channel $p$, propagates though junction $r$ and finishes its journey in output channel $t$. For input tuple $z=0$, $x=1$ and $y=0$, an excitation wave-front is initiated in input channel $b$, propagates through junction $d$ into channel $h$, through junctions $j$ and $i$ into channel $k$, through junction $n$ into channel $n$, and finally enters the output channel $t$. When inputs are $z=0$,, $x=0$ and $y=1$ a wave-front initiated in input channel $c$ propagates through $d$, along $f$, through $i$, along $k$, through $m$, along $n$ and ends up in output channel $t$. For combination of inputs $z=0$, $x=1$ and $y=1$ wave-fragments are initiated in input channels $b$ and $c$, they merge into a single wave-fragment at junction $d$. This newly born wave-fragment propagates along $g$, through $j$, along $l$, through $s$ and into output channel $u$. Dynamics of excitation waves for inputs $z=1$, $z=1$ and $y=0$ is shown in Fig. 10b. The wave-fragments merge into a single wave-fragment at junction $m$ and the newly born fragment propagates into output channel $u$. When all three input has state bit up, $z=1$, $x=1$, $y=1$, the wave-fragment representing $z=1$ does not interact with the wave-fragment produced by merged wave-fragments representing $x=1$ and $y=1$ (Fig. 10c). Thus we have wave-fragments appearing on both output channels $t$ and $u$.

Trajectories of wave-fragments for all possible combinations of inputs are shown in Tab. 1. The output channel $t$ symbolises Sum $x\oplus y\oplus z$ and channel $u$ Carry out $xy+z(x\oplus y)$.

The full adder blocks (Fig. 9) can be straightforwardly cascaded into a many-bit adder. An example of a 4-bit adder is shown in Fig. 11. As we can see, an $n$-bit full adder can be made of $2n$ one-bit half-adders. Signals, represented by wave-fragments, are fully synchronised. Therefore, we can feed input data into the many-bit adder with period exceeding two wave-width, so excited heads of current signals do not interfere with refractory tails of previous signals. Assuming that a width of excitation wave-front in BZ system is circa 0.5-1 mm Ginn et al. (2004); Davydov et al. (2002), and the speed of propagation is about 1 mm per minute, we believe that many-bits full adder’s clock frequency could be 0.01 Hz. With regards to a spatial complexity, to stay on the safe side we assume that one-bit full adder fits into $10\times 3$ mm box, thus $n$-bit adder would take $10\cdot n\times 3$ mm space. That is e.g. eight-bit adder implemented with fusion gates in sub-excitable BZ medium would be 8 cm by 0.3 cm in size.

We proposed implementation of binary adders in architectures of homogeneous channels in Belousov-Zhabotinsky (BZ) system. A fusion gate is a key element of the architecture. The function of the fusion gate is to allow lonely excitation wave-fragments to pass along their original trajectories undisturbed but directing a new wave-fragment born after collision between two wave-fragments along the new trajectory. Localised wave-fragments exist only in sub-excitable BZ system. Unfortunately, they are unstable: after some period of propagation the wave-fragments start expanding or collapsing. Thus to keep signals propagation without decay, we kept BZ medium in the excitable mode inside the channel. To prevent signals from exploding at the junction we kept the BZ medium in sub-excitable mode at the junctions between the channels. If required, the whole architecture can be kept in sub-excitable mode by enforcing periodic changes of excitability.

In experimental laboratory conditions, the architecture can be implemented in two ways. We can make physical templates of the arithmetical circuits, where channels are depressions filled with BZ solution. Such approach would be robust, however the whole architecture would be non-reconfigurable. And we would still need to apply illumination to control excitability. Using only light would be the most efficient and elegant approach. If BZ medium is light-sensitive then generation and propagation of waves is controlled by illlumination. In the Oregonator model (1) this control is expressed via constant $\phi$. This is a rate of inhibitor production proportional to intensity of illumination. Thus the architecture of a computing circuit can be projected onto the medium, in such a manner that channels are black and background is white. Then excitation waves will be confined to the channels because rest of the medium would be non-excitable. Moreover, by dynamically varying illumination at the junctions we can implement polymorphic logical gates by controlling outcomes of inter-fragment collisions using the illumination level. For example, in Adamatzky et al. (2011) we demonstrated that how to switch the BZ collision gate between nor to xnor modes.

Let us compare our design with previous implementations (Fig. 12. Our previous design of one-bit half-adder implemented in BZ system in computer model Adamatzky (2010) and laboratory experiments Costello et al. (2011) has four inputs (data signals are duplicated) and four junctions where wave-fragments interact (Fig. 12a). Half-adder implemented in computer models in Sun and Zhao (2015) has two inputs and two outputs and seven junctions, or interactions loci (Fig. 12b). The architecture Sun and Zhao (2015) consists of six disconnected domains of ‘conductivity’ and has seven junctions, which control propagation of excitation wave-fronts. The half-adder designed in our present paper (Fig. 12c) has two input and two outputs, only three junctions between channels, and wave-fragment can interact only in two junctions.

Obviously, one can find advantages in every implementation. For example, the first ever BZ half-adder design Adamatzky (2010); Costello et al. (2011) produces conjunction in addition to carry out and sum; and, the design Sun and Zhao (2015) does not require a control of excitability at the junctions. Yet our present architecture seems to be more optimal because it is made of a single domain of ‘conductivity’ where excitation wave-fragments can interact only in two junctions. Also, speaking in terms of laboratory experiments each coincidence detector Gorecka and Gorecki (2003) and/or chemical diode Igarashi and Gorecki (2011), used in Sun and Zhao (2015), add to overall unreliability of the system because things can go wrong when excitation waves try to pass loci of discontinuity, because even a width of channel Szymanski and Gorecki (2010); Kitahata et al. (2004) strongly affects dynamics of wave-fronts.

There are three obvious directions of further studies: speed up, application domain, and extension to many-valued circuits. BZ circuits implemented in experimental laboratory conditions are slow, each cycle of computation takes quarter of an hour. To speed up the computation, we can implement the BZ adders in analog devices Asai et al. (2005), molecular arrays Reif (2012) and at the nano-scale Konkoli and Wendin (2014). With regards to the application domain, we envisage that our designs can be successfully integrated in embedded chemical sensing devices Nakata et al. (2009), Yoshikawa et al. (2009). And yet another direction of future research could be in expanding our designs to many-valued logic circuits. In principle, we can implement three-valued gates with wave-fragments in BZ system Motoike and Adamatzky (2005), based on facilitation or inhibition between two subsequent excitation fronts, more work is required though to achieve cascading of these many-valued logic gates.