Phonon downconversion to suppress correlated errors in superconducting qubits

Both the non-Cu and Cu chips are fabricated on high-resistivity ($>10\,{\rm k}\Omega$-cm) 100-mm Si wafers; for the Cu chip, the wafer is double-side polished to facilitate the deposition and patterning of the Cu reservoirs. Initially the wafer is put through a standard RCA clean process and then submerged in a buffered-2$\%$ per vol. HF bath to remove native oxides immediately before sputter-deposition for the non-Cu (Cu) chip of a 55-nm (80-nm) thick Nb film on the top surface of each wafer. We pattern the Nb films using a deep-UV photostepper to define the ground plane, feedline, readout resonators, qubit islands, charge-bias lines, and injector junction pads followed by a dry etch using BCl₃, Cl₂, and Ar in an ICP etcher. In the case of the non-Cu devices, we proceed with the wafer to the Josephson junction definition step, while for the Cu devices, we next fabricate the Cu reservoirs.

After stripping the base layer resist with a TMAH hot strip bath, we then coat the surface with the Nb pattern using a thick photoresist layer (SPR-220-3.0) to protect the Nb during the subsequent backside processing for the Cu reservoirs. We then deposit a metal seed layer on the back side of the wafer using electron-beam evaporation of Ti (20 nm) at a deposition rate of 1Å/s followed by Cu (100 nm) deposited at 2Å/s.

For the Cu reservoirs, we deposit Cu on the wafer back side with an electrodeposition process by submerging our wafer into a copper sulfate and sulfuric acid solution. We grow a 10-$\mu{\rm m}$ thick Cu film on top of the seed layers at a rate of $\sim$3.3 $\mu{\rm m/hr}$ using an alternating current deposition mode. A test film grown with the same parameters and patterned into a narrow strip using Kapton tape was measured to have RRR $\sim$42. The islands were defined with a lattice of partial 50-$\mu{\rm m}$-wide dicing saw cuts through the Cu film into the back side of the wafer, with the cuts extending $20\,\mu{\rm m}$ into the back surface of the Si, resulting in island areas of $(200\,\mu{\rm m})^{2}$. After the Cu islands are fabricated, all resist is stripped in a TMAH hot strip bath.

For both wafers, the Josephson junctions are then defined with a conventional double-angle shadow-evaporation process using 100 keV electron-beam lithography of a PMMA/MMA bilayer resist stack. After an in situ ion mill cleaning step to remove native oxide from the Nb surface at the contact points to the junction electrodes, the junctions are formed with electron-beam evaporation of Al. The bottom (top) junction electrode is 40 (80) nm thick.

Following the fabrication, the wafers are diced into chips that are (8 mm)². The coplanar waveguide feedline runs across the middle of the wafer, with the 1/4-wave readout resonators for each qubit inductively coupled to the feedline. A full-chip layout can be seen in Supplementary Fig. 1, along with close-up views of each qubit, the non-Cu injector junction, and the Cu island pattern on the back side of the Cu chip. Editing of the individual micrographs to obtain the full-chip image is described in Supplementary Note 7. The locations of the qubits measured in the experiment relative to the injector junctions used for controlled QP poisoning, as well as the inter-qubit separations, are indicated in Supplementary Fig. 1(g-i).

Measurements on both the non-Cu and Cu chips are performed on the same dilution refrigerator cooldown running at a temperature below 15 mK. The Al sample boxes for both chips are mounted on the same cold-finger inside a single Cryoperm magnetic shield. A Radiall relay switch on the output lines of the two devices allows us to switch between measurements of one chip or the other. Supplementary Fig. 2 details the configuration of cabling, attenuation, filtering, and shielding inside the cryostat, as well as the room-temperature electronics hardware for control and readout. The inner surfaces of the Cryoperm magnetic shield and the mixing chamber shield were both coated with an infrared-absorbent layer sBarends2011 . For the charge biasing of the qubits, wiring limitations on our dilution refrigerator prevented us from connecting to all of the bias traces on the chips. For the non-Cu chip, charge bias lines are connected to $Q_{B}$ and $Q_{C}$; for the Cu chip, there is only a bias connection to $Q_{A}$.

Supplementary Table 1 lists relevant qubit parameters for both chips, including the qubit transition frequency $f_{01}$, the readout resonator frequency $f_{RO}$, the peak-to-peak maximum charge dispersion $2\delta f$, the mean and standard deviation from repeated baseline $T_{1}$ measurements, and the $E_{\rm J}/E_{\rm c}$ ratios. During the junction fabrication, the same double-angle evaporation process is used for the injector and qubit junctions, and thus all junctions on a chip have nominally the same critical current density. For each device, one of the junctions around the perimeter of the chip is connected to a 50-$\Omega$ bias lead to use as the injector junction (indicated by color highlighting in Supplementary Fig. 1); the injector junction for each chip is $\sim$3 times the area of the qubit junctions. Because the junctions on the Cu and non-Cu chips were processed separately, the critical current densities on the two chips are slightly different. For the injector junctions, $R_{n}=3.5~{}(3.0)~{}{\rm k}\Omega$ for the non-Cu (Cu) chips. The qubit junctions were all designed to have the same area and, based on witness junctions on the same chip written with the same area, had normal resistance of $R_{n}=12.2~{}(10.8)~{}{\rm k}\Omega$ for the non-Cu (Cu) chips.

For measurements of enhancements to the qubit relaxation rate following pulsing of the injector junction, in the main paper we present measurements of $\Delta\Gamma_{1}$ for $Q_{C}$ on the non-Cu chip and $Q_{B}$ for the Cu chip. In this section, we compile these measurements for the other qubits, and show that the response of the other qubits on each chip is consistent with the representative measurements in the main paper.

Supplementary Fig. 3(a) contains measurements of $\Delta\Gamma_{1}$ vs. the delay between the 10-$\mu$s injection pulse and the $X$ pulse for the relaxation measurement for all three qubits on both the non-Cu and Cu chips. In Supplementary Fig. 3(b), we plot the same data for the three qubits on the non-Cu chip on a semilog scale. The black dashed line corresponds to a characteristic timescale of 60 $\mu$s for injected phonons to leave the chip following the phonon arrival peak. Error bars on $\Delta\Gamma_{1}$ values, here and in Fig. 2 in the main paper, are calculated from fit errors with 95$\%$ confidence intervals from $T_{1}$ fits with contributions added in quadrature.

Supplementary Fig. 4 contains plots of $\Delta\Gamma_{1}$ vs. $V_{b}$ for a delay of 30 $\mu$s for all three qubits on both chips. In Supplementary Fig. 5, we plot the same type of measurements but with a delay of 100 ns. In this second case, the antenna-resonance peaks from the photonic coupling to the Josephson radiation emitted by the injector junction are enhanced, while the remaining phononic poisoning is somewhat lower, as not all of the injected phonons have reached the qubit yet. The change in reduced QP density in the qubit junction leads, $\Delta x_{\rm qp}$, that is plotted on the right axes can be calculated from $\Delta\Gamma_{1}$ as $\Delta x_{\rm qp}=\pi\Delta\Gamma_{1}/\sqrt{2\Delta_{\rm Al}\omega_{01}/\hbar}$ sWang2014 , where $\omega_{01}$ is the qubit transition frequency.

When the injection pulse amplitude is below $2\Delta_{\rm Al}$, we observe only minimal reduction in $T_{1}$; there is still some non-zero, but small, poisoning in this regime because our junction biasing scheme still permits the injector junction to undergo relaxation oscillations for small bias voltages sVernon1968 , where the junction can momentarily switch out to the gap before retrapping.

As described in the main paper, voltage bias of the injector junction will also induce poisoning from the emission of Josephson radiation. For a pulse amplitude $V_{b}$, the Josephson radiation will have frequency $V_{b}/\Phi_{0}$, where $\Phi_{0}\equiv h/2e$ is the magnetic flux quantum; $h$ is Planck’s constant and $e$ is the electron charge. Such electromagnetic radiation can be resonantly absorbed by qubit structures acting as antennas, with typical resonant frequencies in the hundreds of GHz range. The absorbed radiation can then drive high-frequency currents through the qubit junction and generate QPs, as described recently in Ref. sRafferty2021 ; sliu2022 . A related photon-based QP poisoning mechanism was considered in Ref. sHouzet2019 .

In order to model the spurious qubit antenna resonances on our devices, we follow the analysis in Ref. sRafferty2021 ; sliu2022 and compute the radiation impedances of the injector junction and the qubit structure with a finite-element simulation using CST Microwave sCST .

With the critical current values for the injector and qubit junctions extracted from the on-chip witness junction measurements, we calculate the product of the coupling efficiencies to free space for the injector junction $e_{c}^{\rm inj}$ and the qubit junction $e_{c}^{q}$. In Supplementary Fig. 6, we plot this product as a function of the injector junction pulse amplitude $V_{b}$ for both $Q_{B}$ on the Cu chip and $Q_{C}$ on the non-Cu chip. The fundamental peaks in the simulation for both qubits match the measured antenna resonances from $\Delta\Gamma_{1}$ in Fig. 2(b) in the main paper and Supplementary Fig. 5 in the supplement.

We implement a Ramsey pulse sequence that has been used previously to map QP parity onto qubit 1-state occupation sRiste2013 ; sSerniak2018 ; sChristensen2019 ). We apply an $X/2$ pulse, idle for a time corresponding to a quarter of a qubit precession period, then apply a $Y/2$ pulse, followed by a qubit measurement. If the offset charge corresponds to the point of maximum charge dispersion, the final $Y/2$ pulse will rotate the state vector to the north/south poles of the Bloch sphere dependent on the QP parity state. Although some of the qubits on each chip have connections to the charge-bias line, we have chosen to perform our QP parity switching measurements without active stabilization of the offset charge. This allows the QP parity measurements to proceed without interruptions from periodic charge-tomography sequences sChristensen2019 . However, when the offset charge jumps to near $(n+1/2)e$ (for integer $n$), where the bands cross, the fidelity of the QP parity-mapping sequence approaches zero.

In order to compute the power spectral density of the QP parity switching, we perform the QP parity switching measurement on each qubit with 20,000 single shots at a repetition period of 10 ms (although PSD measurements for the Cu chip on the second cooldown used a 25-ms repetition period). For each single-shot measurement stream, we apply a simple thresholding based on the 0/1 readout calibration levels for each respective qubit to produce a digital time trace of QP parity. We then compute the PSD from the resulting digital trace and average several such PSD traces together (between 20-160) to obtain the curves in Fig. 3(a) in the main paper and Supplementary Fig. 7. Because we are not actively stabilizing the offset charge at the point of maximum dispersion, some of the PSD traces that are being averaged will have the environmental offset charge near the degeneracy point, where the QP parity readout fidelity vanishes. This results in an enhancement of the white noise floor, but still allows for a clear extraction of the characteristic QP parity switching rate.

We are able to fit the resulting power spectra with a single Lorentzian using the form described in Ref. sRiste2013 :

where $\Gamma_{\rm p}$ is the parity switching rate, $F$ is the parity sequence mapping fidelity, and $\Delta t$ is the parity measurement repetition period.

Supplementary Fig. 7 shows the PSD for all three qubits on each chip. During our experiment, after collecting a majority of our data once the dilution refrigerator had been cold for several months, an unplanned power outage caused our dilution refrigerator to warm up to room temperature. Upon immediately cooling the same two devices back down, without making any changes to the wiring or shielding, we remeasured the PSD for each qubit within a few weeks of the start of this second cooldown. The plots in Supplementary Fig. 7 contain the PSD for each qubit on both chips measured on the first and second cooldowns. For all qubits, the QP parity switching rates increase on the second cooldown, likely because some elements in the qubit environment, for example, the isolators, attenuators, or shields, have not yet fully cooled to the base temperature (see Supplementary Note 12 for further discussion). Nonetheless, the $\Gamma_{\rm p}$ values on the Cu chip remain at least one order of magnitude lower compared to the non-Cu chip.

To complement Fig. 3(b) in the main paper, in this section, we plot the measured switching probability for each qubit on the non-Cu chip [Supplementary Fig. 8(a)] and Cu chip [Supplementary Fig. 8(b)] as a function of the injector junction pulse length. For each chip, all three qubits exhibit a similar behavior. Supplementary Fig. 8(c,d) contain the double- and triple-coincidence switching probabilities for the non-Cu and Cu chips, along with comparisons to the square and cube of the single-qubit switching probabilities for one of the qubits on each chip, as discussed in the main paper.

In order to locate the parity switching steps from the simultaneous QP parity measurements, we apply the following data processing steps. First, because the offset charge was not actively stabilized, we need to identify the portions of the data stream for each qubit where the environmental offset charge jumped to near the degeneracy point, where the parity mapping fidelity approaches zero. This involves finding the envelope of the peak-to-peak signal for the parity time trace with an applied moving average of 100 time steps. If the envelope is below a threshold determined by the qubit 0/1 readout calibration levels, the portion of data until the envelope extends above the threshold is masked off and not analyzed further when digitizing the parity time traces. We next digitize the parity time traces by applying a moving average to the unmasked raw parity data to improve the signal-to-noise ratio. We then use a hidden Markov model (HMM) to identify the parity states. For the QP parity data without junction injection presented here, we use a moving average of 40 time steps. After fitting Gaussians to the qubit 0/1 single-shot readout calibration measurements, we use these distributions to assign a probability for the parity signal to have a value along the signal axis corresponding to an odd- or even-parity state. For the HMM, we also set the probability for the system to transition from odd to even parity and vice versa based on the repetition time of the single shots and the $\Gamma_{\rm p}$ extracted separately from the QP parity PSDs for each qubit. With this information, we then use the Viterbi algorithm to fit a digital signal to the averaged data, thus extracting the most probable parity state given the readout value along the signal axis. In a few instances, we use a modified HMM scheme for the parity analysis. This involves implementing a simple threshold method which assigns the parity of the state based on the data with an applied moving average relative to the total mean of the data. With a parity value assigned at each time index, we derive the statistics for the value of the parity signal given its state. We then use these parameters and the transition probabilities described previously to augment the HMM approach and fit a digital signal to the averaged data. Supplementary Fig. 9 shows an example of ths parity switching analysis for $Q_{A}$ on the non-Cu chip.

We then use the digital signal that was found through the HMM scheme to locate parity switches. We take the absolute value of the difference of adjacent points of the digital signal, which results in a peak at the location of each parity switch. The parity switching rate for each qubit $r_{i}$, where $i=A,B,C$, is given by $N_{i}/\tau_{i}$, where $N_{i}$ is the total number of parity switches for that particular qubit and $\tau_{i}$ is the total duration of unmasked data for the qubit. The uncertainty in $r_{i}$ comes from the standard Poisson counting errors $N_{i}^{1/2}/\tau_{i}$.

Measuring the parity of all three qubits on either chip simultaneously allows us to track correlated events between qubits. In order to identify parity switching coincidences, we must process the digital parity traces obtained as described in the previous section to look for simultaneous switching between qubits. Because the moving averages that are applied to the raw parity measurement data to improve the signal-to-noise ratio also cause the switching events to have a shallower step, we must implement a windowing process to find coincidences. Because the effective width of the switching steps is approximately equal to the number of moving average time steps, we set our window size to match the number of moving averages, thus, coincident switches should occur no farther apart than the width of the falling/rising edges.

Supplementary Fig. 10 shows the effects of different window sizes for the same example parity data trace. We sweep our window through the simultaneous digital signals, and if multiple switches occur within our window size, they are identified as coincidences. For a window size well below the number of moving averages, the code misses a double coincidence [Supplementary Fig. 10(a)], while for a window size much greater than the number of moving averages, switches from separate events are misidentified as a coincidence.

Following the coincidence switching identification, the events are indexed with the appropriate type ($Q_{A}\land Q_{B}$, $Q_{B}\land Q_{C}$, $Q_{A}\land Q_{C}$, or $Q_{A}\land Q_{B}\land Q_{C}$). With this approach, every triple coincidence is also counted as three double coincidences. We also restrict each switch of a given qubit to participate in only one event per coincidence type. For example, a $Q_{B}$ switch cannot be used for two $Q_{A}\land Q_{B}$ coincidences, but could be used for a $Q_{A}\land Q_{B}$ coincidence and a $Q_{B}\land Q_{C}$ coincidence. In Supplementary Fig. 11, we present example simultaneous parity traces for all three qubits for both chips. We also represent the locations of extracted coincidences with vertical dashed lines.

The switching rate for each type of coincidence event $r_{i}$, where $i=AB,BC,AC,ABC$, is given by $N_{i}/\tau_{i}$, where $N_{i}$ is the total number of events and $\tau_{i}$ is the total duration of unmasked data for event type $i$. Note that double coincidences between qubits $j$ and $k$ are only counted during the period when both qubits are unmasked; similarly, triple coincidences require that all three qubits are unmasked. The uncertainty in $r_{i}$ comes from the standard Poisson counting errors $N_{i}^{1/2}/\tau_{i}$.

In Supplementary Table 2, we explore the effect of different window sizes and moving averages on the observed parity switching rates for both chips. For higher averages, we observe a moderate decrease ($\sim$10%) in the single-qubit switching rate, which we attribute to occasional narrow features with two closely spaced switches that get averaged below the threshold for larger numbers of moving averages. At the same time, the double- and triple-coincidence rates increase somewhat as the window size increases. Nonetheless, we still observe the same overall trend between the two chips: the single-qubit parity switching rates for the Cu chip remain $\sim$1 order of magnitude lower than for the non-Cu chip, and the double- and triple-coincidence rates are still $\sim$2 orders of magnitude lower.

For a set of observed single-qubit parity switching rates $r_{A-C}^{\rm obs}$ with a non-zero window $\Delta t$ for identifying double- and triple-coincidence switching, one would expect a rate for random uncorrelated coincidence switching given by the product of the probabilities for observing a parity switch for each of the constituent qubits in the coincidence event during the interval $\Delta t$. Thus, the expected random background double-concidence rate for qubits $i$ and $j$ is given by $(r_{i}^{\rm obs}\Delta t)(r_{j}^{\rm obs}\Delta t)/\Delta t$; similarly the expected random background triple-coincidence rate for qubits $i$, $j$, and $k$ is given by $(r_{i}^{\rm obs}\Delta t)(r_{j}^{\rm obs}\Delta t)(r_{k}^{\rm obs}\Delta t)/\Delta t$. These expected random coincidence parity switching rates are listed in Supplementary Table 2 for different numbers of moving averages and window sizes. The error bars for these random background coincidence rates were computed by summing the fractional uncertainty for each observed rate in quadrature. We note that these random background coincidence rates remain well below the observed rates as we vary the windowing and averaging.

While the quantities we measure in our simultaneous parity measurements are the observed parity switching rates, we would like to compute the actual poisoning event rates for each qubit, or group of qubits in the case of correlated poisoning. This calculation requires accounting for the random background coincidence switching described above, as well as the probability for recording a parity switch for a given poisoning event: 1/2 in the case of single-qubit poisoning, 1/4 for double-qubit correlated poisoning, and 1/8 for triple-qubit poisoning, as described in the main paper.

For the observed parity switching, each double-coincidence event will also be recorded as two single-qubit switching events; similarly, each triple-coincidence event will also be recorded as three double-qubit switching events and three single-qubit switching events. Here, we define the extracted poisoning event rates $r_{i}$ to be exclusive; for example, a single poisoning event that couples to both $Q_{A}$ and $Q_{B}$ will contribute to $r_{AB}$ but will not contribute to $r_{A}$ or $r_{B}$.

Based on these criteria, we can use the observed parity switching rates $r_{i}^{\rm obs}$ to compute the probability for observing each type of parity switching event in a window interval $\Delta t$ as $p_{i}^{\rm obs}=r_{i}^{\rm obs}\Delta t$. We can then derive expressions for the probability of observing each type of parity switching event in terms of the actual probability for each type of poisoning event:

In Supplementary Table 3, we list the values $N_{i}$ for each single qubit parity switch and coincidence event, as well as the total unmasked duration $\tau_{i}$ for the particular type of event. For the right three columns, the observed parity switching rates $r_{i}^{\rm obs}$, expected random background coincidence rates $r_{i}^{\rm background}$, and extracted actual poisoning rates $r_{i}$ correspond to the values presented in Fig. 4(b) in the main paper.

As described in Supplementary Note 14, an unplanned power outage caused our experiment to be split between two cooldowns. Most of the data was collected during the first cooldown, after the dilution refrigerator had been cold for several months. Data measured during the second cooldown was taken within a few weeks of the start of the cooldown. Supplementary Table 4 compares the observed parity switching rates and extracted poisoning rates for the non-Cu chip on the two cooldowns. Supplementary Table 5 makes the same comparison for the Cu chip. Although the cryostat was not opened in between the cooldowns and nothing was changed in the wiring, filtering, or shielding, the shorter time period after the start of the second cooldown likely resulted in incomplete thermalization of the radiative environment of the qubit, potentially involving amorphous, non-metallic elements in some of the microwave components or qubit packaging that could slowly release heat over long timescales. This would lead to higher effective blackbody temperatures and a larger flux of THz photons or enhancements to other sources of pair-breaking phonons, such as heat-only events sAastrom2006 ; sArmengaud2016 ; sAnthony2022 , thus resulting in the higher poisoning rates observed on both chips. We note that Ref. sMannila2022 also reported a slow decay in QP poisoning rates of a mesoscopic superconducting island over a timescale of several weeks with no clear mechanism for the source of the poisoning.

For a charge-sensitive qubit, besides the parity-mapping sequence, one can also perform a charge tomography sequence to measure the environmental offset charge, provided the qubit has a charge-bias line sChristensen2019 ; sWilen2021 . The Ramsey sequence involves two $X/2$ pulses with an idle time $t_{i}=1/2\delta f$, where $2\delta f$ is the maximum charge dispersion for the qubit. A qubit measurement at the end of the sequence results in a 1-state probability:

where $n_{g}$ is the sum of the externally applied gate charge $n_{g}^{\rm ext}$ and the environmental offset charge $\delta n_{g}$; $d$ and $\nu$ are fitting parameters. Supplementary Fig. 12(a) shows an example charge tomography trace for $Q_{B}$ on the non-Cu chip and a fit to Supplementary Eq. (3).

The charge tomography measurement sequence takes 28 (28.8) s and we repeat this sequence 2000 (2250) times for $Q_{B}$ ($Q_{A}$) on the non-Cu (Cu) chip. ($Q_{B}$ on the non-Cu chip; $Q_{A}$ on the Cu chip). From the fit to each tomography scan, we extract $\delta n_{g}$, which we plot as a function of time over 16 (18) hours for the non-Cu (Cu) chips [Supplementary Fig. 12(b)]. From these traces, we find that large charge jumps ($\Delta q>0.1e$) occur at a rate of 0.0012(1) s^-1 and 0.0011(1) s^-1 for a qubit on the Cu and non-Cu chips, respectively.

Based on this rate of offset charge jumps, we can estimate the rate of $\gamma$ impacts on the chip $R_{\gamma}$ by following the detailed analysis in Ref. sWilen2021 . In this case, the authors obtained $R_{\gamma}=0.0198$ s^-1 from similar measurements of offset charge jump rates, combined with detailed modeling of the effective charge sensing area of their qubits (19,902 $\mu$m²) and simulations of the charge dynamics in the Si substrate. We can approximate the charge sensing area for our qubits by taking this to be the area of the qubit shunt capacitor island extended out to half of the distance between the island and ground plane pocket (6612 $\mu$m²). To estimate $R_{\gamma}$ for our experiment, we scale the corresponding value in Ref. sWilen2021 by the ratio of the charge sensing area in Ref. sWilen2021 to that for our qubit, the ratio of our measured offset charge jump rate to that in Ref. sWilen2021 (0.00135 s^-1), and the ratio of our qubit chip area [$(8\,{\rm mm})^{2}$] to that in Ref. sWilen2021 [$(6.25\,{\rm mm})^{2}$], leading to the estimate $R_{\gamma}=0.083(8)$ s^-1 in our system.

The image presented in Supplementary Fig. 13(a) was made by stitching together 20 optical micrographs to achieve a full chip picture. Once each micrograph was aligned, the composite image was converted to grayscale and the contrast increased. At this step, minor surface contamination was removed digitally to limit distraction from important device features. Finally, to remove the vignetting present in each individual picture, the image was processed using MATLAB, which identified the range of pixel values for the Nb background and altered each pixel to reflect the average value with some random noise. The result can be seen in Supplementary Fig. 13(b). The images presented in Fig. 1 and Supplementary Fig. 1 have been false-colored to highlight different parts of the chip.